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TLV5619 INTERFACED TO TMS320C203 DSP

Hardware Interface

A2

A3

A4

A6

IS

D(0–11)

5 V

A

B

C

G1

G2A

G2B

CS

D(0–11)

Y1

VDD

PD

WE

REFIN

Output

REF191

OUT

LDAC

WE

RLOAD

TMS320C203

74AC138

TLV5619

12

Software

TLV5619

SLAS172F – DECEMBER 1997 – REVISED FEBRUARY 2004

APPLICATION INFORMATION (continued)

Figure 13 shows an example of the connection between the TLV5619 and the TMS320C203 DSP. The only

other device that is needed in addition to the DSP and the DAC is the 74AC138 address decoding circuit . Using

this configuration, the DAC address is 0x0084 within the I/O memory space of the TMS320C203.

LDAC is held low so that the output voltage is updated with the rising WE edge. The power down mode is

deactivated permanently by pulling PD to VDD.

Figure 13. TLV5619 to TMS320C203 DSP Interface Connection

No setup procedure is needed to access the TLV5619. The output voltage can be set using one command:

out data_addr,

DAC_addr

Where data_addr points to the address location (in this example 0x0060) holding the new output voltage data

and DAC_addr is the I/O space address of the TLV5619 (in this example 0x0084).

The following code shows, how to use the timer of the TMS320C203 as a time base to generate a voltage ramp

with the TLV5619. A timer interrupt is generated every 205 µs. The corresponding interrupt service routine

increments the output code (stored at 0x0060) for the DAC and writes the new code to the TLV5619. Only the 12

LSBs of the data in 0x0060 are used by the DAC, so that the resulting period of the saw waveform is:

•

t = 4096

× 205 E-6 s = 0.84 s

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