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IP1718 LF
Preliminary Data Sheet
on the RXDATA during the high pulse of RXSYNC. The RX_DV(receive data valid) status follows CRS
and finally the 8-bit data.
For a given PHY port, the SS-SMII consists of six signals.
RXDATA-one bit data for receiver
TXDATA- one bit data for transmitter
TXSYNC- This signal is driven by MAC.
RXSYNC- This signal is driven by PHY.
TXCLK- This signal is driven by MAC
RXCLK- This signal is driven by PHY.
TXCLK
TX_SYNC
TX_D[0]
TXER
TXEN
TXD0
TXD2
TXD1
TXD3
TXD4
TXD5
TXD6
TXD7
TXER
Transmit SS-SMII
RXCLK
RX_SYNC
RX_D[0]
CRS
RXDV
RXD0
RXD2
RXD1
RXD3
RXD4
RXD5
RXD6
RXD7
CRS
Receive SS-SMII
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January 27, 2005
Copyright © 2003, IC Plus Corp.
IP1718 LF-DS-R05