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IP1718 LF
Preliminary Data Sheet
21/33
January 27, 2005
Copyright © 2003, IC Plus Corp.
IP1718 LF-DS-R05
Register
Address
Register Description
Attribute
Default
value
26H
VLAN Tag based priority enable for pot17 and port 18, 1 bit per port
bit[9:8] :
0: disable
1: enable
Other bits are reserved.
R/W
10’h0
27H
IP DS based priority enable for port16~pot1, 1 bit per port
bit[15:0] : 0: disable
1: enable
R/W
16’h0
28H
IP DS based priority enable for port 17 and pott 18, 1 bit per port
bit[9:8] :
0: disable
1: enable
Other bits are reserved.
R/W
10’h0
29H
Switch MAC address[15:0]
R/W
16’h0
2AH
Switch MAC address[31:16]
R/W
16’h0
2BH
Switch MAC address[47:32]
R/W
16’h0
2CH
Out queue schedule mode / weight selection
Bit[1:0] : Schedule mode
2’b00: First in First out
2’b01: Strict Priority.
The IP1718 LF will always forward all packets with
high priority until the packet in the high priority queue
is empty.
2’b10 : WRR. Weighted-and-round-robin scheme.The
packet number in both priority queues is based on the
defined ratio.
2’b11 : undefined
Bit[4:2] : Low priority queue weight number when the WRR mode is
selected
Bit[7:5] : High priority queue weight number when the WRR mode is
selected.
Note:
When Bit[4:2] and Bit[7:5] are set to “000”, the weight number
will be interpreted as “8”.
R/W
8’d0
2DH
Reserved for test. Do not access to this register.
R/W
9’d475
2EH
Reserved for test. Do not access to this register.
R/W
9’d500
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