IP1001-DS-R02 datasheet(25/48 Pages) ETC2

25 / 48 page

IP1001 LF

Data Sheet

25/48

Dec. 18, 2007

IP1001-DS-R06

3.10

Digital Internal Function

The IP1001 integrates all necessary function blocks to achieve the communication ability over CAT5

unshielded twisted pair cables. These function blocks include analog blocks and digital blocks.

Analog function blocks includes analog to digital converter (ADC), digital to analog converter (DAC), active

hybrid, and high-speed 1.25GHz transmitter/receiver. Digital function blocks include digital adaptive

feed-forward equalizer (FFE), decision-feedback equalizer (DFE), echo canceller (EC), near-end-cross-talk

canceller, baseline wander canceller, and digital phase lock-loop (DPLL). Some other encoding/decoding

blocks are also necessary in the transmission/receiving data path.

3.11

IEEE802.3 1000BASE_T Test mode

IP1001 supports four test modes for 1000BASE_T defined in IEEE802.3 clause 40.6. User can force IP1001

to be in test mode to characterize its waveform, jitter, and distortion by programming MII register 9[15:13].

IP1001-DS-R02 数据表(PDF) 25 Page - List of Unclassifed Manufacturers