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IP175A LF
Preliminary Data Sheet
47/60
February 20, 2006
Copyright © 2004, IC Plus Corp.
IP175A LF-DS-R08
ROM
MII
Pin name
Description
Default
EEPROM registers 18H~21H
20[7:0] 1C[7:0]
--
Vlan_tag_4_low
This register defines the low byte of VLAN tag for port 4.
(i.e. Port 4 vlan_tag[7:0])
8’b0
21[7:0] 1C[15:8]
--
Vlan_tag_4_high
This register defines the high byte of VLAN tag for port 4.
(i.e. Port 4 vlan_tag[15:8])
8’b0
ROM
MII
Pin name
Description
(Testing & verify mode register 3)
Default
EEPROM registers 22H
22[7:6]
--
--
Reserved
2’b01
22[5:4]
--
--
Reserved
2’b00
22[3:0]
--
--
Reserved
4’b0000
ROM
MII
Pin name
Description
(Testing & verify mode register 4)
Default
EEPROM registers 23H
23[7:0]
--
--
Reserved
8’h00
ROM
MII
Pin name
Description
(Testing & verify mode register 5)
Default
EEPROM registers 24H
24[7:0]
--
--
Reserved
8’h01