IP178C/IP178C LF/IP178CH/IP178CH LF
Datasheet
Pin description (continued)
Pin No.
Label
Type
Description
Misc.
36
NC
(FXSD6)
(for IP178CH only)
54
OSCI
I
25Mhz system clock
It is recommended to connect OSCI and X2 to a 25M crystal.
If the clock source is from another chip or oscillator, the clock
should be active at least for 1ms before pin 64 RESETB
de-asserted.
Pin 55 X2 should be left open in this application.
55
X2
O
Crystal pin
A 25Mhz crystal can be connected to OSCI and X2.
64
RESETB
I
Reset
It is low active. It must be hold for more than 1ms. It is Schmitt
trigger input. If a R/C reset circuit is used, the capacitor should
be connected to VCC_O as shown in the figure.
VCC_O
GND
R
RESETB
C
84
LOW_10M_DIS
Or
SCA_DIS
IPH2
LOW_10M_DIS or SCA_DIS
If pin 73 SEL_SCA is pull low, then pin 84 is LOW_10M_DIS.
If pin 73 SEL_SCA is pull high, then pin 84 is SCA_DIS.
For LOW_10M_DIS
1: disable power saving mode, the 10M transmit amplitude is
depressed in this mode. (default)
0: enable power saving mode
For SCA_DIS
1: Disable smart cable analysis function (default).
0: Enable smart cable analysis function.
EEPROM
104
SCL
IPL2
/O
Clock of EEPROM
After reset, it is used as clock pin SCL of EEPROM. After
reading EEPROM, this pin becomes an input pin. Its period is
longer than 10us.
IP178C/IP178CH stops reading the rest data in EEPROM if the
first two bytes in EEPROM aren’t 55AA.
16/93
June 21, 2007
Copyright © 2004, IC Plus Corp.
IP178Cx-DS-R12
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