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IP175C/IP175C LF/IP175CH/IP175CH LF
Data Sheet
22/111
Mar 09, 2007
Copyright © 2004, IC Plus Corp.
IP175C/IP175CH-DS-R14
Pin description (continued)
Pin No.
Label
Type
Description
External MII2 interface (MAC mode, MII2_MAC_MOD=1, MII2_EN=1)
103
MII2_TXCLK
I
MII transmit clock
It is an input clock and it is connected to MII_TXCLK of external PHY.
102, 101,
100, 97
TXD2_0, TXD2_1,
TXD2_2, TXD2_3
O
MII transmit data
It is connected to MII_TXD of external PHY. It is sent out at the
rising edge of MII2_TXCLK.
96
TXEN2
O
MII transmit enable
It is an output signal and is connected to MII_TXEN of external
PHY. It is sent out at the rising edge of MII2_TXCLK.
110
COL2
IPL2
MII collision
It is an input signal and is connected to the MII_COL of external PHY.
104
RXDV2
I
MII receive data valid
It is an input signal and is connected to the MII_RXDV of
external PHY. RXDV2 is used to frame RXD2[3:0].
108, 107,
106, 105
RXD2_0, RXD2_1,
RXD2_2, RXD2_3
I
Receive data
It is NRZ data and is connected MII_RXD[3:0] of external PHY. It
is received at the rising edge of MII2_RXCLK.
109
MII2_RXCLK
I
MII receive clock
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