IP175C/IP175C LF/IP175CH/IP175CH LF
Data Sheet
89/111
Mar 09, 2007
Copyright © 2004, IC Plus Corp.
IP175C/IP175CH-DS-R14
Spanning tree register
PHY
MII
ROM
R/W
Description
Default
Fast mode for simulation,
1: Fast mode, 0: normal mode
Default value
TEST2=0
TEST2=1
16.15
--
RO
0
Pin 66 FASTMODE (0)
*
16.12
66.4
R/W Learning enable
1: enable address learning capability of port 4
0: disable address learning capability of port 4
1
16.11
66.3
R/W Learning enable
1: enable address learning capability of port 3
0: disable address learning capability of port 3
1
16.10
66.2
R/W Learning enable
1: enable address learning capability of port 2
0: disable address learning capability of port 2
1
16.9
66.1
R/W Learning enable
1: enable address learning capability of port 1
0: disable address learning capability of port 1
1
16.8
66.0
R/W Learning enable
1: enable address learning capability of port 0
0: disable address learning capability of port 0
1
16.7
65.7
R/W Stag_en special tagging function enable
If this function is enabled, IP175C/IP175CH inserts source port
information in tag header.
1: enable special tagging function
0: disable special tagging function
0
16.4
65.4
R/W Forward enable
1: enable receiving function of port 4
0: disable receiving function of port 4
1
16.3
65.3
R/W Forward enable
1: enable receiving function of port 3
0: disable receiving function of port 3
1
16.2
65.2
R/W Forward enable
1: enable receiving function of port 2
0: disable receiving function of port 2
1
16.1
65.1
R/W Forward enable
1: enable receiving function of port 1
0: disable receiving function of port 1
1
30
16.0
65.0
R/W Forward enable
1: enable receiving function of port 0
0: disable receiving function of port 0
1
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