TS5MP645

4-Data Lane

MIPI Switch

VDD

2.2 µF

1.65 V ± 5.5 V

100 nF

Processor

MIPI Module 1

MIPI Module 2

SEL

/OE

CLK

Data[1:4]

CLK

Data[1:4]

CLK

Data[1:4]

Copyright © 2018, Texas Instruments Incorporated

Product

Folder

Order

Now

Technical

Documents

Tools &

Software

Support &

Community

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

TS5MP645

SCDS385B – JANUARY 2018 – REVISED JULY 2018

TS5MP645 4-Data Lane 2:1 MIPI Switch (10-Channel, 2:1 Analog Switch)

1

1 Features

1

•

Supply Range of 1.65 V to 5.5 V

•

10-Channel 2:1 Switch

•

Powered-Off Protection

I/Os Hi-Z when VDD = 0 V

•

Low RON of 2.45-Ω Typical

•

Low CON of 1.5 pF

•

Minimum bandwidth of 1.5 GHz

•

Ultra Low Crosstalk of -40 dB

•

Low Power Disable Mode

•

1.8-V Compatible Logic Inputs

•

ESD Protection Exceeds JESD 22

–

2000-V Human Body Model (HBM)

2 Applications

•

Mobile Phones

•

Tablet

•

PC/Notebook

•

Virtual Reality

•

Augmented Reality

3 Description

The TS5MP645 is a four data lane MIPI switch. This

device is an optimized 10 channel (5 differential)

single-pole, double-throw switch for use in high speed

applications. The TS5MP645 is designed to facilitate

multiple MIPI compliant devices to connect to a single

CSI/DSI, C-PHY/D-PHY module.

The device has excellent bandwidth, low channel to

channel skew with little signal degradation, and wide

margins to compensate for layout losses. The low

current consumption meets the need of low power

applications.

Device Information(1)

PART NUMBER

PACKAGE

BODY SIZE (NOM)

TS5MP645

DSBGA (YFP)

2.42 mm x 2.42 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Simplified Schematic