Thermal

Pad

2

NC

3

NC

4

DC_BOOST/ENA_HS

5

D2P

6

D2M

9

D1M

10

D1P

11

SDA

12

VCC

13

SCL/CD

Not to scale

3

TUSB215-Q1

www.ti.com

SLLSF07 – SEPTEMBER 2017

Product Folder Links: TUSB215-Q1

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Copyright © 2017, Texas Instruments Incorporated

(1)

Pull-down and pull-up (to 3.3 V) resistors for DC_BOOST pins must be between 22 kΩ to 47 kΩ in non I2C mode.

(2)

Pull-up resistors for SDA and SCL pins in I2C mode should be 4.7 kΩ (5%). If both SDA and SCL are pulled up at reset the device

enters into I2C mode.

5 Pin Configuration and Functions

RGY Package

14 Pin (VQFN)

Top View

Pin Functions

PIN

I/O

INTERNAL

PULLUP/PULLDOWN

DESCRIPTION

NAME

NO.

EQ

1

I

N/A

USB High Speed AC boost select via external pull down resistor.

Sampled upon de-assertion of RSTN. Does not recognize real time

adjustments.

See application section for details. Auto selects maximum AC boost level

when left floating.

NC

2, 3

N/A

N/A

Leave unconnected.

DC_BOOST(1

)/ENA_HS

4

I/O

In I2C mode:

Reserved for TI test purpose.

In non-I2C mode:

At reset: 3-level input signal DC_BOOST. USB High Speed DC signal boost

selection.

H (pin is pulled high) – 80 mV

M (pin is left floating) – 60 mV

L (pin is pulled low) – 40 mV

After reset: Output signal ENA_HS. Flag indicating that channel is in High

Speed mode. Asserted upon:

1. Detection of USB-IF High Speed test fixture from an unconnected state

followed by transmission of USB TEST_PACKET pattern.

2. Squelch detection following USB reset with a successful HS handshake [HS

handshake is declared to be successful after single chirp J chirp K pair where

each chirp is within 18 μs – 128 μs].

D2P

5

I/O

N/A

USB High Speed positive port.

D2M

6

I/O

N/A

USB High Speed negative port.

GND

7

PWR

N/A

Ground

VREG

8

O

N/A

1.8-V LDO output. Only enabled when operating in High Speed mode.

Requires 0.1-µF external capacitor to GND to stabilize the core.

D1M

9

I/O

N/A

USB High Speed negative port..

D1P

10

I/O

N/A

USB High Speed positive port.

SDA(2)

11

I/O

RSTN asserted: 500 k

Ω PD

I2C Mode:

Bidirectional I2C data pin [I2C address = 0x2C].

In non I2C mode:

Reserved for TI test purpose.