DAC8564 datasheet(25/51 Pages) TI2

25 / 51 page

DAC

REF(+)

ResistorString

REF( )

REF

OUTX

62kW

50kW

OUTX

4096

2 ´

REF

L+(

REF

DIVIDER

ToOutputAmplifier

(2xGain)

DAC7565

www.ti.com

SBAS412B

– FEBRUARY 2008 – REVISED MARCH 2011

THEORY OF OPERATION

code loaded into the DAC register determines at

which node on the string the voltage is tapped off to

DIGITAL-TO-ANALOG CONVERTER (DAC)

be fed into the output amplifier by closing one of the

The DAC7565 architecture consists of a string DAC

switches connecting the string to the amplifier. It is

followed by an output buffer amplifier. Figure 92

monotonic because it is a string of resistors.

shows a block diagram of the DAC architecture.

Figure 92. DAC7565 Architecture

The input coding to the DAC7565 can be straight

binary or two's complement, so the ideal output

voltage is given by Equation 1.

(1)

where DIN = decimal equivalent of the binary code

that is loaded to the DAC register; it can range from 0

to 4095. X represents channel A, B, C, or D.

DATA FORMAT

The data format can be straight binary or two

’s

complement.

Table

illustrates

the

differences

between USB (unsigned straight binary) and BTC

(binary two

’s complement) data formats.

Table 1. USB and BTC Codes

USB CODE

BTC CODE

DESCRIPTION

Figure 93. Resistor String

0FFFh

07FFh

+Full-Scale

– 1LSB

...

0801h

0001h

Midscale + 1LSB

OUTPUT AMPLIFIER

0800h

0000h

Midscale

The output buffer amplifier is capable of generating

07FFh

0FFFh

Midscale

– 1LSB

rail-to-rail voltages on its output, giving an output

...

range of 0V to AVDD. It is capable of driving a load of

Ω in parallel with 1000pF to GND. The source and

0000h

0800h

Zero Scale

sink capabilities of the output amplifier can be seen in

the Typical Characteristics. The slew rate is 2.2V/

μs,

RESISTOR STRING

with a full-scale settling time of 8

μs with the output

The resistor string section is shown in Figure 93. It is

unloaded.

simply a string of resistors, each of value R. The

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