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STP16DP05 数据表(PDF) 16 Page - STMicroelectronics |
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STP16DP05 数据表(HTML) 16 Page - STMicroelectronics |
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16 / 28 page ![]() Detection mode functionality STP16DP05 16/28 7 Detection mode functionality 7.1 Phase one: “entering in detection mode“ From the “Normal Mode” condition the device can switch to the “Error Mode“ by a logic sequence on the OE\DM2 and LE/DM1 pins as showed in the following table and diagram: After these five CLK cycles the device goes into the “Error Detection Mode“ and at the 6th rise front of CLK the SDI data are ready for the sampling. Table 12. Entering in detection truth table CLK 1°2°3°4° 5° OE/DM2 H L HHH LE/DM1 LLL H L Figure 15. Entering in detection timing diagram |
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