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SN74LVC2G34DBVT 数据表(PDF) 8 Page - Texas Instruments |
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SN74LVC2G34DBVT 数据表(HTML) 8 Page - Texas Instruments |
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8 / 28 page ![]() 1A 1Y 1 6 2A 2Y 3 4 SN74LVC2G34 SCES359J – AUGUST 2001 – REVISED OCTOBER 2015 www.ti.com 8 Detailed Description 8.1 Overview The SN74LVC2G34 device contains two buffer gates that each perform the Boolean function Y = A. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. 8.2 Functional Block Diagram 8.3 Feature Description The SN74LVC2G34 device has a wider operating voltage range, operating from 1.65 V to 5.5 V, and allows down voltage translation. The SN74LVC2G34 Ioff feature allows voltages on the inputs and outputs when VCC is 0 V. 8.4 Device Functional Modes Table 1 lists the functional modes of the SN74LVC2G34. Table 1. Function Table INPUT OUTPUT A Y H H L L 8 Submit Documentation Feedback Copyright © 2001–2015, Texas Instruments Incorporated Product Folder Links: SN74LVC2G34 |
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