7

TAS5352A

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SLES239A – NOVEMBER 2008 – REVISED DECEMBER 2016

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Copyright © 2008–2016, Texas Instruments Incorporated

Electrical Characteristics (continued)

PVDD_x = 34.5 V, GVDD_X = 12 V, VDD = 12 V, TC (Case temperature) = 25°C, and fS = 384 kHz (unless otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

OTE-OTWdifferential

(1)

OTE - OTW differential

Temperature delta between OTW and

OTE

30

°C

OLPC

Overload protection counter

fS = 384 kHz

1.25

ms

IOC

Overcurrent limit protection

Resistor—programmable, high-end,

ROC = 22 kΩ with 1-mS pulse

10.9

A

IOCT

Overcurrent response time

150

ns

tACTIVITY DETECTOR

Time for PWM activity detector to

activate when no PWM is present

Lack of transition of any PWM input

13.2

μS

IPD

Output pulldown current of each half-

bridge

Connected when RESET is active to

provide bootstrap capacitor charge. Not

used in SE mode.

3

mA

STATIC DIGITAL SPECIFICATIONS

VIH

High-level input voltage

PWM_A, PWM_B, PWM_C, PWM_D,

M1, M2, M3, RESET_AB, RESET_CD

2

V

VIL

Low-level input voltage

0.8

V

ILeakage

Input leakage current

100

μA

OTW/SHUTDOWN (SD)

RINT_PU

Internal pullup resistance, OTW to

VREG, SD to VREG

20

26

32

k

Ω

VOH

High-level output voltage

Internal pullup resistor

3

3.3

3.6

V

External pullup of 4.7 k

Ω to 5 V

4.5

5

VOL

Low-level output voltage

IO = 4 mA

0.2

0.4

V

FANOUT

Device fanout OTW, SD

No external pullup

30

Devices

(1)

SNR is calculated relative to 0-dBFS input level.

(2)

Actual system idle losses are affected by core losses of output inductors.

6.6 Audio Specifications (BTL)

Audio performance is recorded as a chipset consisting of a TAS5518 PWM processor (modulation index limited to 97.7%)

and a TAS5352A power stage. PCB and system configuration are in accordance with recommended guidelines. Audio

frequency = 1 kHz, PVDD_x = 34.5 V, GVDD_x = 12 V, RL = 4 Ω, fS = 384 kHz, ROC = 22 kΩ, TC = 75°C, output filter: LDEM =

10 μH, CDEM = 470 nF (unless otherwise noted).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

POMAX

Maximum power output

RL = 4 Ω, 10% THD+N, clipped input signal

125

W

RL = 6 Ω, 10% THD+N, clipped input signal

100

RL = 8 Ω, 10% THD+N, clipped input signal

76

PO

Unclipped power output

RL = 4 Ω, 0 dBFS, unclipped input signal

96

RL = 6 Ω, 0 dBFS, unclipped input signal

72

RL = 8 Ω, 0 dBFS, unclipped input signal

57

THD+N

Total harmonic distortion + noise

0 dBFS, AES17 filter

0.4%

1 W, AES17 filter

0.09%

Vn

Output integrated noise

A-weighted, AES17 filter, Auto mute

disabled

50

μV

SNR

Signal-to-noise ratio(1)

A-weighted, AES17 filter, Auto mute

disabled

110

dB

DNR

Dynamic range

A-weighted, input level = –60 dBFS, AES17

filter

110

dB

DC Offset

Output offset voltage

±15

mV

Pidle

Power dissipation due to idle losses

(IPVDD_X)

PO = 0 W, all half-bridges switching

(2)

2.6

W