5

TLV702

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SLVSAG6D – SEPTEMBER 2010 – REVISED JULY 2019

Product Folder Links: TLV702

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Copyright © 2010–2019, Texas Instruments Incorporated

(1)

VDO is measured for devices with VOUT(nom) ≥ 2.35 V.

(2)

Start-up time = time from EN assertion to 0.98 × VOUT(nom).

6.5 Electrical Characteristics

At VIN = VOUT(nom) + 0.5 V or 2 V (whichever is greater); IOUT = 10 mA, VEN = 0.9 V, COUT = 1 μF, and TJ = –40°C to +125°C,

unless otherwise noted. Typical values are at TJ = 25°C.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VIN

Input voltage range

2

5.5

V

VOUT

DC output accuracy

–40°C

≤ TJ ≤ 125°C

–2%

0.5%

2%

ΔVOUT(ΔVIN)

Line regulation

VOUT(nom) + 0.5 V ≤ VIN ≤ 5.5 V,

IOUT = 10 mA

1

5

mV

ΔVOUT(ΔIOUT)

Load regulation

0 mA

≤ IOUT ≤ 300 mA

1

15

mV

VDO

Dropout voltage(1)

VIN = 0.98 × VOUT(nom), IOUT = 300 mA

260

375

mV

ICL

Output current limit

VOUT = 0.9 × VOUT(nom)

320

500

860

mA

IGND

Ground pin current

IOUT = 0 mA

35

55

μA

IOUT = 300 mA, VIN = VOUT + 0.5 V

370

μA

ISHDN

Ground pin current (shutdown)

VEN ≤ 0.4 V, VIN = 2 V

400

nA

VEN ≤ 0.4 V, 2 V ≤ VIN ≤ 4.5 V,

TJ = –40°C to +85°C

1

2

μA

PSRR

Power-supply rejection ratio

VIN = 2.3 V, VOUT = 1.8 V,

IOUT = 10 mA, f = 1 kHz

68

dB

Vn

Output noise voltage

BW = 100 Hz to 100 kHz,

VIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA

48

μVRMS

tSTR

Start-up time(2)

COUT = 1 μF, IOUT = 300 mA

100

μs

VEN(high)

Enable pin high (enabled)

0.9

VIN

V

VEN(low)

Enable pin low (disabled)

0

0.4

V

IEN

Enable pin current

VIN = VEN = 5.5 V

0.04

μA

UVLO

Undervoltage lockout

VIN rising

1.9

V

RDISCHARGE

Active pulldown resistance

(TLV702P only)

VEN = 0 V

120

Ω

Tsd

Thermal shutdown temperature

Shutdown, temperature increasing

165

°C

Reset, temperature decreasing

145

°C

TJ

Operating junction temperature

–40

125

°C