PFS7526H datasheet(19/37 Pages) POWERINT

19 / 37 page

Rev. D 04/25

PFS7523-7529/7533-7539

www.power.com

PCB Design Guidelines and Design Example

The line-sense network and the feedback circuit use large resistance

values in order to minimize power dissipation in the feedback network

and the line-sense network. Care should be taken to place the

feedback circuit and the line-sense network components away from

the high-voltage and high current nodes to minimize any interference.

Any noise injected in the feedback network or the line-sense network

will typically manifest as degradation of power factor. Excessive

noise injection can lead to waveform instability or dissymmetry.

The EMI filter components should be clustered together to improve

filter effectiveness. The placement of the EMI filter components on

the circuit board should be such that the input circuit is located away

from the drain node of the PFC inductor.

A filter or decoupling capacitor should be placed at the output of the

bridge rectifier. This capacitor together with the X capacitance in the

EMI filter and the differential inductance of the EMI filter section and

the source impedance, works as a filter to reduce the switching

frequency current ripple in the input current. This capacitor also helps

to minimize the loop area of the switching frequency current loop

thereby reducing EMI.

The connection between the HiperPFS-3 drain node, output diode

drain terminal and the PFC inductor should be kept as short as

possible.

A low loss ceramic dielectric capacitor should be connected between

the cathode of the PFC output diode and the source terminal of the

HiperPFS-3. This ensures that the loop area of the loop carrying high

frequency currents at the transition of the MOSFET and helps to

reduce radiated EMI due to the high frequency pulsating nature of

the diode current traversing through the loop.

During placement of components on the board, it is best to place the

voltage monitor, feedback, reference and bias power decoupling

capacitors as close as possible to the pins before the other components

are placed and routed. REFERENCE pin decoupling capacitor needs

to have dedicated return path to GROUND pin. Failing to do so could

reduce the noise immunity during surge and ESD test. Power supply

return trace from the GROUND pin should be separate from the trace

connecting the feedback circuit components to the GROUND pin.

To minimize the effects of trace impedance on regulation, output

feedback should be taken directly from the output capacitor positive

terminal. The upper end of the line-sense resistors should be

connected to the high frequency filter capacitor connected at the

output of the bridge rectifier.

Figure 19. PCB Layout Example.

EMI

Filter

Thermistor

Shorting Relay

PFC

Output

PFC Output

Capacitor

PFC

Inductor

Bridge

Rectifier

HiperPFS-3

Auxiliary

Supply

for PFC

Input

Capacitor

PI-7312-062215

Input

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