October 2001

©2001 Fairchild Semiconductor Corporation

FDS6892A Rev C (W)

FDS6892A

Dual N-Channel Logic Level PWM Optimized PowerTrench

®

® MOSFET

General Description

These N-Channel Logic Level MOSFETs are produced

using

Fairchild

Semiconductor’s

advanced

PowerTrench process that has been especially tailored

to minimize the on-state resistance and yet maintain

superior switching performance.

These devices are well suited for low voltage and

battery powered applications where low in-line power

loss and fast switching are required.

Features

• 7.5 A, 20 V.

RDS(ON) = 18 m

Ω @ V

GS = 4.5 V

RDS(ON) = 24 m

Ω @ V

GS = 2.5 V

• Low gate charge (12 nC)

• High performance trench technology for extremely

low RDS(ON)

• High power and current handling capability

S

D

S

S

SO-8

D

D

D

G

D2

D2

D1

D1

S2

G2

S1

G1

Pin 1

SO-8

4

3

2

1

5

6

7

8

Q1

Q2

Absolute Maximum Ratings

TA=25

oC unless otherwise noted

Symbol

Parameter

Ratings

Units

VDSS

Drain-Source Voltage

20

V

VGSS

Gate-Source Voltage

± 12

V

ID

Drain Current

– Continuous

(Note 1a)

7.5

A

– Pulsed

30

Power Dissipation for Dual Operation

2

Power Dissipation for Single Operation

(Note 1a)

1.6

(Note 1b)

1

PD

(Note 1c)

0.9

W

TJ, TSTG

Operating and Storage Junction Temperature Range

–55 to +150

°C

Thermal Characteristics

RθJA

Thermal Resistance, Junction-to-Ambient

(Note 1a)

78

°C/W

RθJC

Thermal Resistance, Junction-to-Case

(Note 1)

40

°C/W

Package Marking and Ordering Information

Device Marking

Device

Reel Size

Tape width

Quantity

FDS6892A

FDS6892A

13’’

12mm

2500 units