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CD74HCT03M 数据表(PDF) 13 Page - Texas Instruments

部件名 CD74HCT03M
功能描述  CDx4HCT03 Quadruple 2-Input NAND Gates with Open-Drain Outputs
PDF  27 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

CD74HCT03M 数据表(HTML) 13 Page - Texas Instruments

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11 Layout
11.1 Layout Guidelines
When using multiple-input and multiple-channel logic devices inputs must not ever be left floating. In many
cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of
a triple-input AND gate are used. Such unused input pins must not be left unconnected because the undefined
voltages at the outside connections result in undefined operational states. All unused inputs of digital logic
devices must be connected to a logic high or logic low voltage, as defined by the input voltage specifications, to
prevent them from floating. The logic level that must be applied to any particular unused input depends on the
function of the device. Generally, the inputs are tied to GND or VCC, whichever makes more sense for the logic
function or is more convenient.
11.2 Layout Example
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
2A
2B
2Y
GND
V
CC
4B
4A
3B
3A
3Y
GND
V
CC
4Y
1Y
0.1
F
Unused
inputs tied to
VCC
Bypass capacitor
placed close to the
device
Avoid 90°
corners for
signal lines
Recommend GND flood fill for
improved signal isolation, noise
reduction, and thermal dissipation
Unused
output left
floating
Figure 11-1. Example layout for the CD74HCT03
www.ti.com
CD74HCT03, CD54HCT03
SCHS414 – JUNE 2020
Copyright © 2021 Texas Instruments Incorporated
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