STM32F446RC datasheet(7/202 Pages) STMICROELECTRONICS

7 / 202 page

DocID027107 Rev 6

7/202

STM32F446xC/E

List of figures

Figure 45.

ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144

Figure 46.

Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

Figure 47.

Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . 146

Figure 48.

Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . 147

Figure 49.

12-bit buffered/non-buffered DAC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151

Figure 50.

Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms . . . . . . . . . . . . . . 153

Figure 51.

Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms . . . . . . . . . . . . . . 155

Figure 52.

Asynchronous multiplexed PSRAM/NOR read waveforms. . . . . . . . . . . . . . . . . . . . . . . . 156

Figure 53.

Asynchronous multiplexed PSRAM/NOR write waveforms . . . . . . . . . . . . . . . . . . . . . . . 158

Figure 54.

Synchronous multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

Figure 55.

Synchronous multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162

Figure 56.

Synchronous non-multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . 164

Figure 57.

Synchronous non-multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165

Figure 58.

NAND controller waveforms for read access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167

Figure 59.

NAND controller waveforms for write access . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167

Figure 60.

NAND controller waveforms for common memory read access . . . . . . . . . . . . . . . . . . . . 168

Figure 61.

NAND controller waveforms for common memory write access. . . . . . . . . . . . . . . . . . . . 168

Figure 62.

SDRAM read access waveforms (CL = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169

Figure 63.

SDRAM write access waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171

Figure 64.

DCMI timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

Figure 65.

SDIO high-speed mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

Figure 66.

SD default mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174

Figure 67.

LQFP64-10x10 mm 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . 176

Figure 68.

LQFP64 Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177

Figure 69.

LQFP64 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178

Figure 70.

LQFP100, 14 x 14 mm 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . 179

Figure 71.

LQFP100 - 100-pin, 14 x 14 mm low-profile quad flat

recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180

Figure 72.

LQFP100 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181

Figure 73.

LQFP144, 20 x 20 mm, 144-pin low-profile quad flat package outline . . . . . . . . . . . . . . . 182

Figure 74.

LQFP144 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184

Figure 75.

LQFP144 marking example (package top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185

Figure 76.

UFBGA144 - 144-pin, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball

grid array package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 186

Figure 77.

UFBGA144 - 144-ball, 7 x 7 mm, 0.50 mm pitch, ultra fine pitch ball

grid array package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187

Figure 78.

UQFP144 7 x 7 mm marking example (package top view). . . . . . . . . . . . . . . . . . . . . . . . 188

Figure 79.

UFBGA144 - 144-pin, 10 x 10 mm, 0.80 mm pitch, ultra fine pitch ball

grid array package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

Figure 80.

UFBGA144 - 144-pin, 10 x 10 mm, 0.80 mm pitch, ultra fine pitch ball

grid array package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190

Figure 81.

UQFP144 10 x 10 mm marking example (package top view). . . . . . . . . . . . . . . . . . . . . . 191

Figure 82.

WLCSP81 - 81-pin, 3.693 x 3.815 mm, 0.4 mm pitch wafer level chip scale

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192

Figure 83.

WLCSP81- 81-pin, 4.4084 x 3.7594 mm, 0.4 mm pitch wafer level chip scale

package recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193

Figure 84.

WLCSP81 10 x 10 mm marking example (package top view) . . . . . . . . . . . . . . . . . . . . . 194

Figure 85.

USB controller configured as peripheral-only and used in Full speed mode . . . . . . . . . . 197

Figure 86.

USB controller configured as host-only and used in full speed mode. . . . . . . . . . . . . . . . 197

Figure 87.

USB controller configured in dual mode and used in full speed mode . . . . . . . . . . . . . . . 198

Figure 88.

USB controller configured as peripheral, host, or dual-mode

and used in high speed mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199

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