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ADS1291IPBSRG4 数据表(PDF) 3 Page - Texas Instruments |
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ADS1291IPBSRG4 数据表(HTML) 3 Page - Texas Instruments |
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3 / 83 page  3 ADS1291, ADS1292, ADS1292R www.ti.com SBAS502C – DECEMBER 2011 – REVISED APRIL 2020 Product Folder Links: ADS1291 ADS1292 ADS1292R Submit Documentation Feedback Copyright © 2011–2020, Texas Instruments Incorporated Changes from Revision A (March 2012) to Revision B Page • Added QFN package to device graphic.................................................................................................................................. 1 • Added QFN pin out drawing ................................................................................................................................................... 4 • Changed AVSS to DGND row in Absolute Maximum Ratings table ...................................................................................... 6 • Changed parameters of Supply Current (RLD Amplifier Turned Off) section in Electrical Characteristics table ................. 10 • Changed description of bit 6 in LOFF_STATUS: Lead-Off Status register .......................................................................... 59 Changes from Original (December 2011) to Revision A Page • Changed device graphic ......................................................................................................................................................... 1 • Changed device status from Mixed Status to Production Data.............................................................................................. 1 • Changed second Features bullet............................................................................................................................................ 1 • Updated Family and Ordering Information table .................................................................................................................... 6 • Moved ADS1292R to production status ................................................................................................................................. 6 • Deleted footnote 2 from Family and Ordering Information table ............................................................................................ 6 • Changed values of AVDD to AVSS and DVDD to DGND rows in Absolute Maximum Ratings table ................................... 6 • Changed Operating temperature range parameter in Absolute Maximum Ratings table ...................................................... 6 • Changed DC Channel Performance, INL parameter test conditions in Electrical Characteristics table ................................ 7 • Changed AC Channel Performance, SNR and THD parameters test conditions in Electrical Characteristics table ............. 7 • Added third Channel Performance, THD parameter row to Electrical Characteristics table .................................................. 7 • Added Digital Filter section to Electrical Characteristics table ............................................................................................... 8 • Deleted Right Leg Drive Amplifier, Quiescent power consumption parameter test condition from Electrical Characteristics table ............................................................................................................................................................... 8 • Changed Respiration, Impedance measurement noise parameter test conditions in Electrical Characteristics table .......... 8 • Changed Respiration, Maximum modulator current parameter in Electrical Characteristics table ........................................ 8 • Changed Power-Supply Requirements, Digital supply parameter in Electrical Characteristics table .................................... 9 • Changed first IDVDD Supply Current, Normal mode parameter test conditions in Electrical Characteristics table................ 10 • Changed 3-V Power Dissipation, Quiescent power dissipation, per channel parameter typical specifications in Electrical Characteristics table ............................................................................................................................................. 10 • Added CFILTER to Typical Characteristics conditions............................................................................................................. 12 • Updated Figure 5 .................................................................................................................................................................. 12 • Updated Figure 9 and Figure 12 .......................................................................................................................................... 12 • Changed description of CHnSET setting in Supply Measurements (MVDDP, MVDDN) section......................................... 21 • Changed second paragraph of PGA Settings and Input Range section .............................................................................. 23 • Changed description of PD_REFBUF bit in the Reference section ..................................................................................... 27 • Updated second column title in Table 9 ............................................................................................................................... 28 • Updated Figure 33 ................................................................................................................................................................ 30 • Updated Figure 42 ................................................................................................................................................................ 38 • Added description of Figure 43, Figure 43, and Table 12 to Internal Respiration Circuitry with External Clock (ADS1292R) section ............................................................................................................................................................. 39 • Updated description of DOUT and DRDY in RDATAC: Read Data Continuous section ..................................................... 48 • Updated RLD_STAT in address 08h of Table 16................................................................................................................. 51 • Changed description of bit 1 in CONFIG2: Configuration Register 2................................................................................... 53 • Changed descriptions of bits[3:0] in CH2SET: Channel 2 Settings ..................................................................................... 56 • Updated Figure 70 and Figure 71 ........................................................................................................................................ 64 • Updated Figure 73 and added footnote 1............................................................................................................................. 67 • Updated Figure 74 and added footnote 1............................................................................................................................. 68 |
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