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ADS8699IPWR 数据表(PDF) 36 Page - Texas Instruments |
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ADS8699IPWR 数据表(HTML) 36 Page - Texas Instruments |
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36 / 74 page ![]() 7.4.1 Host-to-Device Connection Topologies The multiSPI interface and device configuration registers offer great flexibility in the ways a host controller can exchange data or commands with the device. This section describes how to select the hardware connection topology to meet different system requirements. 7.4.1.1 Single Device: All multiSPI Options Figure 7-20 shows the pin connection between a host controller and a stand-alone device to exercise all options provided by the multiSPI interface. CONVST/CS SCLK SDI RST SDO-0 Host Controller Isolation (Optional) DVDD Device ALARM/SDO-1/GPO RVS Figure 7-20. All multiSPI Protocols Pin Configuration 7.4.1.2 Single Device: Standard SPI Interface Figure 7-21 shows the minimum pin interface for applications using a standard SPI protocol. CONVST/CS SCLK SDI RST SDO-0 Host Controller (Optional) Isolation DVDD Device ALARM/SDO-1/GPO RVS (Optional) (Optional) Figure 7-21. Standard SPI Protocol Pin Configuration The CONVST/CS, SCLK, SDI, and SDO-0 pins constitute a standard SPI port of the host controller. The RST pin can be tied to DVDD. The RVS pin can be monitored for timing benefits. The ALARM/SDO-1/GPO pin may not have any external connection. ADS8691, ADS8695, ADS8699 SBAS777B – DECEMBER 2016 – REVISED MARCH 2021 www.ti.com 36 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: ADS8691 ADS8695 ADS8699 |
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