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TSC2012H 数据表(PDF) 29 Page - STMicroelectronics |
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TSC2012H 数据表(HTML) 29 Page - STMicroelectronics |
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29 / 49 page ![]() 5.6 Error calculation The principal source of error, such as: input offset voltage, gain error, common mode rejection ratio, are described separately in the electrical characteristics. This chapter summarizes the most important error to take into account during a design phase. • Input offset voltage error Equation 2 depicts a first order error calculation just by taking into account the input offset voltage. In a temperature environment, the deviation of the Vio and the error linked to the input offset on the output voltage can be written as equation 4: Vio Error= ±Vio±Dvio/Dt*Gain (4) • Gain error and shunt resistance accuracy Gain error=Gain1+εgain (5) Rsense error=Gain1+εRsense (6) Where εgainisthegainerror0.3%max.fortheTSC2011H. Where εRsenseistheshuntresistanceerror.Shuntresistorsfrom5mΩto100mΩareavailablewith1% accuracy or better. • CMR error In the electrical characteristics, CMR is specified at one input common mode voltage. So in order to take into consideration the variation of the input voltage offset depending on the Vicm, the calculus must be done till this known point. Let us get Vicm = 12 V as a reference point. So the error on Vout due to a common mode voltage variation can be written as in equation 7: CMR error=±Vicm−12V CMR *Gain (7) • Output common mode error (Vocm) This error can be taken into account when the output common mode voltage is set as suggested in Figure 62. Schematic for Vocm error, and so by using the internal divider bridge. Otherwise it is important to take into consideration the error linked to the voltage source applied on the VREF1 pin and VREF2 pin. Figure 62. Schematic for Vocm error The divider bridge is made by two resistances of 50 kΩ given an output common mode voltage of: Vref1+Vref2 2 TSC2010H, TSC2011H, TSC2012H Application information DS13791 - Rev 2 page 29/49 |
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