NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271)

.

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

EXAMPLE BOARD LAYOUT

4224640/A 11/2018

www.ti.com

WQFN - 0.8 mm max height

BQB0016A

PLASTIC QUAD FLAT PACK-NO LEAD

SYMM

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 20X

(1)

(2)

(3.3)

16X (0.24)

16X (0.6)

2X

(2.5)

10X (0.5)

2X (0.5)

(2.3)

2X

(0.75)

(Ø0.2) VIA

TYP

(R0.05) TYP

1

2

7

8

9

10

15

16

0.07 MAX

ALL AROUND

0.07 MIN

ALL AROUND

METAL

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

SOLDER MASK

OPENING

EXPOSED METAL

EXPOSED METAL

NON-SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK

DEFINED