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L9678P 数据表(PDF) 77 Page - STMicroelectronics |
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L9678P 数据表(HTML) 77 Page - STMicroelectronics |
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77 / 215 page  DS11626 Rev 9 77/216 L9678P, L9678P-S SPI interface 214 5.2.20 WD1 test command register (WD1_TEST) Address: 35 Type: W Buffer: - Reset: $006A 5.2.21 System diagnostic register (SYSDIAGREQ) Address: 36 Type: RW Buffer: $3601 Reset: $006C 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 MOSI - $3C X X X X X X X X MISO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 N/A N/A N/A Non-latched WD1 Test Command WD1_TEST SPI command as described in Figure 36: Watchdog state diagram. 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 MOSI - X X X X X X X X X X X X DSTEST[3:0] MISO 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DSTEST[3:0] DSTEST[3:0] 0000 0000 0000 Diagnostic State Test selection Updated by SSM_RESET or SPI write while in DIAG state 0000 = all outputs inactive 0001 = ARM pin active 0010 = all outputs inactive 0011 = all outputs inactive 0100 = all outputs inactive 0101 = all outputs inactive 0110 = VSF regulator active |
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