5.13 Switching Characteristics, 5 V

VCC1 = VCC2 = 5 V ± 10% (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH, tPHL

Propagation delay time

See Figure 6-1

6

10.7

16

ns

PWD(1)

Pulse width distortion |tPHL – tPLH|

0.6

4.6

tsk(pp) (2)

Part-to-part skew time

4.5

ns

tr

Output signal rise time

See Figure 6-1

2.4

3.9

ns

tf

Output signal fall time

2.4

3.9

tPHZ

Disable propagation delay, high-to-high impedance output for

ISO7821DWW and ISO7821FDWW

See Figure 6-2

12

20

ns

tPLZ

Disable propagation delay, low-to-high impedance output for

ISO7821DWW and ISO7821FDWW

12

20

ns

tPZH

Enable propagation delay, high impedance-to-high output for

ISO7821DWW

10

20

ns

Enable propagation delay, high impedance-to-high output for

ISO7821FDWW

2

2.5

μs

tPZL

Enable propagation delay, high impedance-to-low output for

ISO7821DWW

2

2.5

μs

Enable propagation delay, high impedance-to-low output for

ISO7821FDWW

10

20

ns

tfs

Default output delay time from input power loss

Measured from the time VCC goes

below 1.7 V. See Figure 6-3

0.2

9

μs

tie

Time interval error

216 - 1 PRBS data at 100 Mbps

1

ns

(1)

Also known as Pulse Skew.

(2)

tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

5.14 Switching Characteristics, 3.3 V

VCC1 = VCC2 = 3.3 V ± 10% (over recommended operating conditions unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

tPLH, tPHL

Propagation delay time

See Figure 6-1

6

10.8

16

ns

PWD(1)

Pulse width distortion |tPHL – tPLH|

0.7

4.7

tsk(pp) (2)

Part-to-part skew time

4.5

ns

tr

Output signal rise time

See Figure 6-1

1.3

3

tf

Output signal fall time

1.3

3

tPHZ

Disable propagation delay, high-to-high impedance output for

ISO7821DWW and ISO7821FDWW

See Figure 6-2

17

32

ns

tPLZ

Disable propagation delay, low-to-high impedance output for

ISO7821DWW and ISO7821FDWW

17

32

ns

tPZH

Enable propagation delay, high impedance-to-high output for

ISO7821DWW

17

32

ns

Enable propagation delay, high impedance-to-high output for

ISO7821FDWW

2

2.5

μs

tPZL

Enable propagation delay, high impedance-to-low output for

ISO7821DWW

2

2.5

μs

Enable propagation delay, high impedance-to-low output for

ISO7821FDWW

17

32

ns

tfs

Default output delay time from input power loss

Measured from the time VCC goes

below 1.7 V. See Figure 6-3

0.2

9

μs

tie

Time interval error

216 - 1 PRBS data at 100 Mbps

1

ns

(1)

Also known as Pulse Skew.

(2)

tsk(pp) is the magnitude of the difference in propagation delay times between any terminals of different devices switching in the same

direction while operating at identical supply voltages, temperature, input signals and loads.

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ISO7821, ISO7821F

SLLSEM2H – NOVEMBER 2014 – REVISED NOVEMBER 2024

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