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ISO7730FDWR 数据表(PDF) 24 Page - Texas Instruments |
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ISO7730FDWR 数据表(HTML) 24 Page - Texas Instruments |
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24 / 50 page ![]() VI VCC IN OUT VO CL See Note A IN = 0V (Devices without suffix F) IN = VCC (Devices with suffix F) VO VI VOL VOH VCC 0V 1.7V 50% tDO default high default low See Note B A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. B. Power Supply Ramp Rate = 10 mV/ns Figure 6-3. Default Output Delay Time Test Circuit and Voltage Waveforms IN OUT VCCO GNDI + – VCM + – VOH or VOL VCCI Pass-fail criteria: The output must remain stable. C = 0.1µF ±1% C = 0.1µF ±1% CL See Note A S1 GNDO A. CL = 15 pF and includes instrumentation and fixture capacitance within ±20%. Figure 6-4. Common-Mode Transient Immunity Test Circuit ISO7730, ISO7731 SLLSES0K – SEPTEMBER 2016 – REVISED SEPTEMBER 2025 www.ti.com 24 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: ISO7730 ISO7731 |
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