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DP83867CSRGZ 数据表(PDF) 72 Page - Texas Instruments |
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DP83867CSRGZ 数据表(HTML) 72 Page - Texas Instruments |
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72 / 129 page  Table 7-35. Configuration Register 3 (CFG3), Address 0x001E (continued) BIT BIT NAME DEFAULT DESCRIPTION 11 Extended FD Ability 0, RW Extended Full-Duplex Ability: 1 = Force Full-Duplex while working with link partner in forced 100B- TX. When the PHY is set to Auto-Negotiation or Force 100B-TX and the link partner is operated in Force 100B-TX, the link is always Full Duplex 0 = Disable Extended Full Duplex Ability. Decision to work in Full Duplex or Half Duplex mode follows IEEE specification. 10 RESERVED 0, RO RESERVED 9 Robust Auto-MDIX 0, RW Robust Auto-MDIX: 1 =Enable Robust Auto MDI/MDIX resolution 0 = Normal Auto MDI/MDIX mode If link partners are configured to operational modes that are not supported by normal Auto MDI/MDIX mode (like Auto-Neg versus Force 100Base-TX or Force 100Base-TX versus Force 100Base- TX), this Robust Auto MDI/MDIX mode allows MDI/MDIX resolution and prevents deadlock. 8 Fast Auto-MDIX 0, RW Fast Auto MDI/MDIX: 1 = Enable Fast Auto MDI/MDIX mode 0 = Normal Auto MDI/MDIX mode If both link partners are configured to work in Force 100Base-TX mode (Auto-Negotiation is disabled), this mode enables Automatic MDI/MDIX resolution in a short time. 7 INT_OE 0, RW Interrupt Output Enable: 1 = INTN/PWDNN Pad is an Interrupt Output. 0 = INTN/PWDNN Pad in a Power-Down Input. 6 FORCE_INTERRUPT 0, RW Force Interrupt: 1 = Assert interrupt pin. 0 = Normal interrupt mode. 5:3 RESERVED 0, RO RESERVED: Writes ignored, read as 0. 2 TDR_FAIL 0, RO TDR Failure: 1 = TDR failed. 0 = Normal TDR operation. 1 TDR_DONE 1, RO TDR Done: 1 = TDR has completed. 0 = TDR has not completed. 0 TDR_START 0, RW TDR Start: 1 = Start TDR. 0 = Normal operation DP83867CS, DP83867IS, DP83867E SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025 www.ti.com 72 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DP83867CS DP83867IS DP83867E |
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