S24CS02A datasheet(22/47 Pages) SII

22 / 47 page

2-WIRE CMOS SERIAL E2PROM

S-24CS01A/02A/04A/08A

Rev.4.4_00

Seiko Instruments Inc.

3. Matching phases while E

2PROM is accessed

The S-24CS01A/02A/04A/08A does not have a pin for resetting (the internal circuit), therefore, the

2PROM cannot be forcibly reset externally. If a communication interruption occurs in the E2PROM, it

must be reset by software.

For example, even if a reset signal is input to the microprocessor, the internal circuit of the E

2PROM is not

reset as long as the stop condition is not input to the E

2PROM. In other words, the E2PROM retains the

same status and cannot shift to the next operation. This symptom applies to the case when only the

microprocessor is reset when the power supply voltage drops. With this status, if the power supply voltage

is restored, reset the E

2PROM (after matching the phase with the microprocessor) and input an instruction.

The following shows this reset method.

[How to reset E

2PROM]

The E

2PROM can be reset by the start and stop instructions. When the E2PROM is reading data “0” or

is outputting the acknowledge signal, 0 is output to the SDA line. In this status, the microprocessor

cannot output an instruction to the SDA line. In this case, terminate the acknowledge output operation

or read operation, and then input a start instruction. Figure 26 shows this procedure.

First, input the start condition. Then transmit 9 clocks (dummy clocks) of SCL. During this time, the

microprocessor sets the SDA line to high level.

By this operation, the E

2PROM interrupts the

acknowledge output operation or data output, so input the start condition

*1. When a start condition is

input, the E

2PROM is reset. To make doubly sure, input the stop condition to the E2PROM. Normal

operation is then possible.

SCL

SDA

Start

condition

Stop

condition

Start

condition

Dummy clock

Figure 26 Resetting E

2PROM

*1.

After 9 clocks (dummy clocks), if the SCL clock continues to be output without a start condition

being input, a write operation may be started upon receipt of a stop condition. To prevent this, input

a start condition after 9 clocks (dummy clocks).

Remark

It is recommended to perform the above reset using dummy clocks when the system is

initialized after the power supply voltage has been raised.

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