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AX-SIP-SFEU-API 数据表(PDF) 14 Page - ON Semiconductor |
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AX-SIP-SFEU-API 数据表(HTML) 14 Page - ON Semiconductor |
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14 / 20 page ![]() AX−SIP−SFEU, AX−SIP−SFEU−API www.onsemi.com 14 Table 9. COMMANDS (continued) Command Description Name AT:Pn=? Get GPIO Pin Range Print a list of possible modes for a pin. The table below lists the response. Pin Modes P0 0, 1, Z, U, A, T P1 0, 1, Z, U, A P2 0, 1, Z, U, A P3 0, 1, Z, U, A P4 0, 1, Z, U, T P5 0, 1, Z, U P6 0, 1, Z, U P7 0, 1, Z, U P8 0, 1, Z, U P9 0, 1, Z, U P10 0, 1, Z, U P11 0, 1, Z, U P12 0, 1, Z, U, A P13 0, 1, Z, U, A P14 0, 1, Z, U AT:Pn=mode Set GPIO Pin Set the GPIO pin mode. For a list of the modes see the command AT:Pn? AT:ADC Pn[−Pn[ (1V|10V)]]? Get GPIO Pin Analog Voltage Measure the voltage applied to a GPIO pin. The command also allows measurement of the voltage difference across two GPIO pins. In differential mode, the full scale range may also be specified as 1 V or 10 V. Note however that the pin input voltages must not exceed the range 0…VDD_IO. The command returns the result as fraction of the full scale range (1 V if none is specified). The GPIO pins referenced should be initialized to analog mode before issuing this command. AT:SPI[(A|B|C|D)]=bytes SPI Transaction This command clocks out bytes on the SPI port. The clock frequency is 312.5 kHz. The command returns the bytes read on MISO during output. Optionally the clocking mode may be specified (default is A): Mode Clock Inversion Clock Phase A normal normal B normal alternate C inverted normal D inverted alternate D7 D7 D6 D6 D5 D5 D4 D4 D3 D3 D2 D2 D1 D1 D0 D0 SEL(GPIOx) MOSI MISO SCK A B C D Note that SEL, if needed, is not generated by this command, and must instead be driven using standard GPIO commands (AT:Pn=0|1). AT:CLK=freq,reffreq Set Clock Generator Output a square wave on the pin(s) set to T mode. The frequency of the square wave is (freq / 216) × reffreq. Possible values for reffreq are 20000000, 10000000, 5000000, 2500000, 1250000, 625000, 312500, 156250. Possible values for freq are 0…65535. AT:CLK=OFF Turn off Clock Generator Switch off the clock generator AT:CLK? Get Clock Generator Return the settings of the clock generator. Two numbers are returned, freq and reffreq. AT:DAC=value Set SD DAC Output a SD DAC value on the pin(s) set to T mode. Parameter value may be in the range −32768…32767. The average output voltage is (1/2 + value / 217) × VDD. An external low pass filter is needed to get smooth output voltages. The modulation frequency is 20 MHz. A possible low pass filter choice is a simple RC low pass filter with R = 10 kW and C = 1 mF. |
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