AX−SIP−SFEU, AX−SIP−SFEU−API

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17

SIP38 RECOMMENDED PAD LAYOUT

1. PCB land and solder masking recommendations

are shown in Figure 6.

Figure 6. PCB Land and Solder Mask Recommendations

A = Clearance from PCB thermal pad to solder mask opening, 0.0635 mm

minimum

B = Clearance from edge of PCB thermal pad to PCB land, 0.2 mm minimum

C = Clearance from PCB land edge to solder mask opening to be as tight as

possible to ensure that some solder mask remains between PCB pads

D = PCB land length = SIP solder pad length + 0.1 mm

E = PCB land width = SIP solder pad width + 0.1 mm

F = Clearance from solder mask opening to the edge of the package,

0.1 mm minimum to avoid shorts to the package metal shielding

CD

E

B

A

F

Solder Mask

PCB

Thermal Pad

PCB Land

Solder Mask

Opening

2. Thermal vias should be used around the PCB

thermal pads (middle ground pads) to improve

thermal conductivity from the device to a copper

ground plane area on the reverse side of the

printed circuit board. The number of vias depends

on the package thermal requirements, as

determined by thermal simulation or actual testing.

3. Increasing the number of vias through the printed

circuit board will improve the thermal

conductivity to the reverse side ground plane and

external heat sink. In general, adding more metal

through the PC board under the SiP will improve

operational heat transfer, but will require careful

attention to uniform heating of the board during

assembly.

Assembly Process

Stencil Design & Solder Paste Application

1. Stainless steel stencils are recommended for solder

paste application.

2. A stencil thickness of 0.125–0.150 mm

(5–6 mils) is recommended for screening.

3. For the PCB thermal pads, solder paste should be

printed on the PCB by designing a stencil with an

array of 6 openings for each of the 6 thermal/GND

pads.

4. The aperture opening for the signal pads should be

between 50−80% of the SIP pad area as shown in

Figure 7.

5. Optionally, for better solder paste release, the

aperture walls should be trapezoidal and the

corners rounded.

6. The fine pitch of the SiP leads requires accurate

alignment of the stencil and the printed circuit

board. The stencil and printed circuit assembly

should be aligned to within + 1 mil prior to

application of the solder paste.

7. No−clean flux is recommended since flux from

underneath the thermal pad will be difficult to

clean if water−soluble flux is used.

Figure 7. Solder Paste Application on Pins

Minimum 50% Coverage

62% Coverage

Maximum 80% Coverage