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IS25LP256D-RJLA3-TY 数据表(PDF) 90 Page - Integrated Silicon Solution, Inc

部件名 IS25LP256D-RJLA3-TY
功能描述  SERIAL FLASH MEMORY WITH 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  179 Pages
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制造商  ISSI [Integrated Silicon Solution, Inc]
网页  http://www.issi.com
标志 ISSI - Integrated Silicon Solution, Inc

IS25LP256D-RJLA3-TY 数据表(HTML) 90 Page - Integrated Silicon Solution, Inc

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IS25LP256D
IS25WP256D
Integrated Silicon Solution, Inc.- www.issi.com
90
Rev A15
08/05/2024
8.17 WRITE DISABLE OPERATION (WRDI, 04h)
The Write Disable (WRDI) instruction resets the WEL bit and disables all write instructions. The WRDI instruction
is not required after the execution of a write instruction, since the WEL bit is automatically reset.
Figure 8.43 Write Disable Sequence In SPI Mode
Instruction = 04h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.44 Write Disable Sequence In QPI Mode
04h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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