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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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IS25LE128E-RMLA3:P-TY 数据表(PDF) 32 Page - Integrated Silicon Solution, Inc |
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IS25LE128E-RMLA3:P-TY 数据表(HTML) 32 Page - Integrated Silicon Solution, Inc |
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32 / 197 page  IS25LE256E/128E IS25WE256E/128E Integrated Silicon Solution, Inc.- www.issi.com 32 Rev.A9 03/07/2023 1.8V Device (IS25WE) P[6:3] Dummy Cycles2,3 Fast Read5 0Bh/0Ch Fast Read Dual Output 3Bh/3Ch Fast Read Dual IO BBh/BCh Fast Read Quad Output 6Bh/6Ch Fast Read Quad IO EBh/ECh FRDTR 0Dh/0Eh FRDDTR BDh/BEh FRQDTR EDh/EEh SPI QPI SPI SPI SPI SPI, QPI SPI/QPI SPI4 SPI, QPI 0 Default1 166MHz 81MHz 166MHz 98MHz 138MHz 81MHz 80/58MHz 60MHz 58MHz 1 1 98MHz 23MHz 75MHz 46MHz 63MHz 23MHz 46/10MHz 23MHz 10MHz 2 2 110MHz 34MHz 84MHz 75MHz 75MHz 34MHz 58/15MHz 40MHz 15MHz 3 3 122MHz 46MHz 98MHz 87MHz 87MHz 46MHz 69/20MHz 50MHz 20MHz 4 4 133MHz 58MHz 122MHz 98MHz 98MHz 58MHz 75/30MHz 60MHz 30MHz 5 5 145MHz 69MHz 133MHz 110MHz 110MHz 69MHz 80/40MHz 70MHz 40MHz 6 6 156MHz 81MHz 145MHz 122MHz 122MHz 81MHz 80/58MHz 75MHz 58MHz 7 7 166MHz 93MHz 156MHz 133MHz 133MHz 93MHz 80/69MHz 80MHz 69MHz 8 8 166MHz 104MHz 166MHz 145MHz 138MHz 104MHz 80/80MHz 80MHz 80MHz 9 9 166MHz 122MHz 166MHz 156MHz 140MHz 122MHz 80/80MHz 80MHz 80MHz 10 10 166MHz 127MHz 166MHz 166MHz 145MHz 127MHz 80/80MHz 80MHz 80MHz 11 11 166MHz 139MHz 166MHz 166MHz 151MHz 139MHz 80/80MHz 80MHz 80MHz 12 12 166MHz 151MHz 166MHz 166MHz 166MHz 151MHz 80/80MHz 80MHz 80MHz 13 13 166MHz 162MHz 166MHz 166MHz 166MHz 162MHz 80/80MHz 80MHz 80MHz 14 14 166MHz 166MHz 166MHz 166MHz 166MHz 166MHz 80/80MHz 80MHz 80MHz 15 15 166MHz 166MHz 166MHz 166MHz 166MHz 166MHz 80/80MHz 80MHz 80MHz Notes: 1. Default dummy cycles are as follows. Operation Command Dummy Cycles Comment SPI mode QPI mode SPI mode QPI mode Fast Read 0Bh/0Ch 0Bh/0Ch 8 6 RDUID, IRRD instructions are also applied. Fast Read Dual Output 3Bh/3Ch - 8 - Fast Read Quad Output 6Bh/6Ch - 8 - Fast Read Dual IO BBh/BCh - 4 - Fast Read Quad IO EBh/ECh EBh/ECh 6 6 Fast Read DTR 0Dh/0Eh 0Dh/0Eh 8 6 Fast Read Dual IO DTR BDh/BEh - 4 - Fast Read Quad IO DTR EDh/EEh EDh/EEh 6 6 2. Enough number of dummy cycles must be applied to execute properly the AX read operation. 3. Must satisfy bus I/O contention. For instance, if the number of dummy cycles and AX bits cycles are same, then X must be Hi-Z. 4. QPI mode is not available for FRDDTR command. 5. RDUID, IRRD instructions are also applied. |
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