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PCM1753DBQ 数据表(PDF) 21 Page - Texas Instruments

部件名 PCM1753DBQ
功能描述  PCM175x 24-Bit, 192-kHz Sampling, Enhanced Multilevel, Delta-Sigma, Audio, Digital-to-Analog Converter
PDF  41 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

PCM1753DBQ 数据表(HTML) 21 Page - Texas Instruments

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PCM1753, PCM1754, PCM1755
www.ti.com
SLES092E – APRIL 2003 – REVISED JULY 2019
Product Folder Links: PCM1753 PCM1754 PCM1755
Submit Documentation Feedback
Copyright © 2003–2019, Texas Instruments Incorporated
8.6.1.2.2
MUTx: Soft Mute Control
where x = 1 or 2, corresponding to the DAC outputs VOUTL (x = 1) and VOUTR (x = 2).
Default value: 0
The mute bits, MUT1 and MUT2, are used to enable or disable the soft mute function for the corresponding DAC
outputs, VOUTL and VOUTR. The soft mute function is incorporated into the digital attenuators. When mute is
disabled (MUTx = 0), the attenuator and DAC operate normally. When mute is enabled by setting MUTx = 1, the
digital attenuator for the corresponding output is decreased from the current setting to infinite attenuation, one
attenuator step (0.5 dB) for every 8/fS seconds. This provides pop-free muting of the DAC output.
By setting MUTx = 0, the attenuator is increased one step for every 8/fS seconds to the previously programmed
attenuation level.
8.6.1.2.3
OVER: Oversampling Rate Control
Default value: 0
System clock rate = 256 fS, 384 fS, 512 fS, 768 fS, or 1152 fS:
System clock rate = 128 fS or 192 fS:
The OVER bit is used to control the oversampling rate of the delta-sigma D/A converters. The OVER = 1 setting
is recommended when the sampling rate is 192 kHz (system clock rate is 128 fS or 192 fS).
8.6.1.2.4
SRST: Reset
Default value: 0
The SRST bit is used to enable or disable the soft reset function. The operation is the same as power-on reset.
All registers are initialized.
8.6.1.2.5
DACx: DAC Operation Control
Where x = 1 or 2, corresponding to the DAC output VOUTL (x = 1) or VOUTR (x = 2).
Default value: 0
The DAC operation controls are used to enable and disable the DAC outputs, VOUTL and VOUTR. When DACx =
0, the corresponding output generates the audio waveform dictated by the data present on the DATA pin. When
DACx = 1, the corresponding output is set to the bipolar zero level, or 0.5 VCC.



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