I

=

OUT(t)

C

OUT

OUT

´ dV

(t)

dt

V

OUT(t)

R

LOAD

+

IN

OUT

GND

EN

½

TLV751P

V

OUT

V

IN

FB

C

IN

C

OUT

V

EN

R

2

R

1

20

TLV751

SBVS385B – DECEMBER 2019 – REVISED APRIL 2020

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8.2 Typical Application

Figure 42 shows the typical application circuit for the TLV751. Input and output capacitances must be at least

1 µF.

Figure 42. TLV751 Typical Application

8.2.1 Design Requirements

Use the parameters listed in Table 2 for typical linear regulator applications.

Table 2. Design Parameters

PARAMETER

DESIGN REQUIREMENT

Input voltage

3.8 V

Output voltage

3.3 V, ±1%

Input current

500 mA (maximum)

Output load

500-mA dc

Maximum ambient temperature

70°C

8.2.2 Detailed Design Procedure

Input and output capacitors are required to achieve the output voltage transient requirements. Capacitance

values of 2.2 µF are selected to give the maximum output capacitance in a small, low-cost package; see the

Input and Output Capacitor Selection section for details.

Figure 38 illustrates the output voltage of the TLV751; set the output voltage using the resistor divider.

8.2.2.1 Input Current

During normal operation, the input current to the LDO is approximately equal to the output current of the LDO.

During startup, the input current is higher as a result of the inrush current charging the output capacitor. Use

Equation 6 to calculate the current through the input.

where:

•

VOUT(t) is the instantaneous output voltage of the turn-on ramp

•

dVOUT(t) / dt is the slope of the VOUT ramp

•

RLOAD is the resistive load impedance

(6)