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TLV75729PDBVR 数据表(PDF) 21 Page - Texas Instruments |
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TLV75729PDBVR 数据表(HTML) 21 Page - Texas Instruments |
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21 / 41 page ![]() 7.4 Layout 7.4.1 Layout Guidelines • Place input and output capacitors as close as possible to the device. • Use copper planes for device connections to optimize thermal performance. • Place thermal vias around the device to distribute the heat. • For packages with thermal pads, solder the thermal pad to copper to achieve best thermal resistance. Thermal resistance increases significantly when the thermal pad is not soldered. 7.4.2 Layout Examples VOUT VIN GND PLANE Represents via used for application specific connections 1 2 3 4 5 C OUT C IN EN Figure 7-7. Layout Example: DBV Package VIN VOUT GND PLANE Represents via used for application specific connections 1 2 3 4 6 C IN C OUT EN 5 Figure 7-8. Layout Example: DRV Package VEN VOUT VIN GND PLANE 1 2 3 6 5 CIN COUT Thermal Pad Represents via used for application specific connections Figure 7-9. Layout Example: DYD Package www.ti.com TLV757P SBVS322C – OCTOBER 2017 – REVISED MARCH 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TLV757P |
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