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TLV75729PDBVR 数据表(PDF) 13 Page - Texas Instruments |
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TLV75729PDBVR 数据表(HTML) 13 Page - Texas Instruments |
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13 / 41 page ![]() the input voltage there is an increased current flow into the EN pin. If this increased flow causes problems in the application, sequence the EN pin after VIN is high, or tie EN to VIN. If EN is driven to a higher voltage than VIN, limit the frequency on EN to below 10kHz. 6.3.3 Internal Foldback Current Limit The TLV757P has an internal current limit that protects the regulator during fault conditions. The current limit is a hybrid scheme with brick wall until the output voltage is less than 0.4 × VOUT(NOM). When the voltage drops below 0.4 × VOUT(NOM), a foldback current limit is implemented that scales back the current as the output voltage approaches GND. When the output shorts, the LDO supplies a typical current of ISC. The output voltage is not regulated when the device is in current limit. In this condition, the output voltage is the product of the regulated current and the load resistance. When the device output is shorts, the PMOS pass transistor dissipates power [(VIN – VOUT) × ISC] until thermal shutdown is triggered and the device turns off. After the device cools down, the internal thermal shutdown circuit turns the device back on. If the fault condition continues, the device cycles between current limit and thermal shutdown. The foldback current-limit circuit limits the current that is allowed through the device to current levels lower than the minimum current limit at nominal VOUT current limit (ICL) during start up. See Figure 5-27 for typical current limit values. If the output is loaded by a constant-current load during start up, or if the output voltage is negative when the device is enabled, then the load current demanded by the load potentially exceeds the foldback current limit. Thus, causing the device to possibly not rise to the full output voltage. For constant-current loads, disable the output load until the output rises to the nominal voltage. Excess inductance causes the current limit to oscillate. Minimize the inductance to keep the current limit from oscillating during a fault condition. 6.3.4 Thermal Shutdown Thermal shutdown protection disables the output when the junction temperature rises to approximately 165°C. Disabling the device eliminates the power dissipated by the device, allowing the device to cool. When the junction temperature cools to approximately 155°C, the output circuitry is enabled again. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit cycles on and off. This cycling limits regulator dissipation, which protects the circuit from damage as a result of overheating. Activating the thermal shutdown feature usually indicates excessive power dissipation as a result of the product of the (VIN – VOUT) voltage and the load current. For reliable operation, limit junction temperature to a maximum of 125°C. To estimate the margin of safety in a complete design, increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. The internal protection circuitry protects against overload conditions but is not intended to be activated in normal operation. Continuously running the device into thermal shutdown degrades device reliability. www.ti.com TLV757P SBVS322C – OCTOBER 2017 – REVISED MARCH 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TLV757P |
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