STPM32_V02 datasheet(52/89 Pages) STMICROELECTRONICS

52 / 89 page

Table 31. Baud rate register examples

Baud rate

BRDIV

BRRI

BRRF

2400

416.666667

416 = 0x1A0

11 = 0xB

1A0B

9600

104.166667

104 = 0x68

3 = 0x3

683

19200

52.0833333

52 = 0x34

1 = 0x1

341

57600

17.3611111

17 = 0x11

6 = 0x6

116

115200

8.68055556

8 = 0x8

11 = 0xB

230400

4.34027778

4 = 0x4

5 = 0x5

460800

2.17013889

2 = 0x2

3 = 0x3

8.6.4

UART/SPI status register and interrupt control register

At row 20, at read address 0x28, the register is responsible for holding the status of UART/SPI peripherals of the

STPM3x device. Setting the correspondent bit in IRQ CR the interrupt mask raises an interrupt on both INT1,

INT2 pins based on the peripheral status.

Table 32. UART/SPI status and interrupt control register

Bit position

Description

Default value

Access mode

SPI RX overrun

SPITX underrun

SPI CRC error

UART/SPI write address error

UART/SPI read address error

SPITX empty

SPI RX full

UART TX overrun

UART RX overrun

UART noise error

UART frame error

UART timeout error

UART CRC error

UART break

IRQ CR

mask for SPI RX overrun error status bit

maskfor SPI TX underrun error status

bit

mask for SPI CRC error status bit

mask for write address error status bit

mask for read address error status bit

mask for SPITX empty

mask for SPI RX full

mask for UART TX overrun

mask for UART RX overrun

mask for UART noise error

mask for UART frame error

STPM32, STPM33, STPM34

Communication protocol

DS10272 - Rev 13

page 52/89

STPM32 数据表(PDF) 52 Page - STMicroelectronics

STPM32 数据表(HTML) 52 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89

数据表下载