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TPS73418DRVT 数据表(PDF) 4 Page - Texas Instruments |
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TPS73418DRVT 数据表(HTML) 4 Page - Texas Instruments |
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4 / 27 page ![]() DEVICE INFORMATION FUNCTIONAL BLOCK DIAGRAMS Thermal Shutdown UVLO Current Limit 3.3MW Overshoot Detect 500kW 1.208V Bandgap IN EN FB OUT GND 400W Thermal Shutdown UVLO Current Limit 2 A m Overshoot Detect 500kW Quickstart 1.208V Bandgap (1) IN EN NR OUT GND 400W NOTE(1): Fixedvoltageversionsbetween1.0Vto1.2Vhavea1.0Vbandgapcircuit insteadofa1.208Vbandgapcircuit. PIN CONFIGURATIONS TPS734xxDDC TSOT23-5 (TOPVIEW) OUT NR IN GND EN 1 2 3 5 4 TPS73401DDC TSOT23-5 (TOPVIEW) OUT FB IN GND EN 1 2 3 5 4 TPS734xxDRV 2mmx2mmSON-6 (TOPVIEW) IN N/C EN 6 5 4 OUT NR GND 1 2 3 GND TPS73401DRV 2mmx2mmSON-6 (TOPVIEW) IN N/C EN 6 5 4 OUT FB GND 1 2 3 GND TPS734xx SBVS089F – DECEMBER 2007 – REVISED FEBRUARY 2009 ........................................................................................................................................ www.ti.com Figure 1. Fixed Voltage Versions Figure 2. Adjustable Voltage Versions PIN DESCRIPTIONS TPS734xx NAME DDC DRV DRB DESCRIPTION IN 1 6 8 Input supply. GND 2 3, Pad 4 Ground. The pad must be tied to GND. Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the EN 3 4 5 regulator into shutdown mode. EN can be connected to IN if not used. Fixed voltage versions only; connecting an external capacitor to this pin bypasses noise NR 4 2 3 generated by the internal bandgap. This allows output noise to be reduced to very low levels. Adjustable version only; this is the input to the control loop error amplifier, and is used to set FB 4 2 3 the output voltage of the device. Output of the regulator. A small capacitor (total typical capacitance ≥ 2.0 µF ceramic) is OUT 5 1 1 needed from this pin to ground to assure stability. N/C — 5 2, 6, 7 Not internally connected. This pin must either be left open, or tied to GND. 4 Submit Documentation Feedback Copyright © 2007–2009, Texas Instruments Incorporated |
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