5 Pin Configuration and Functions

6

5

4

3

2

1

13

14

15

16

17

18

19

20

21

22

23

24

12

11

10

9

8

7

CH1

CH2

PAD

(must be soldered to GND)

VCC

OS2

DE2

EQ1

EN_RXD

NC

NC

RX1N

RX1P

TX2N

GND

TX2P

VCC

NC

GND

TX1N

TX1P

RX2N

RX2P

NC

OS1

DE1

EQ2

RSV

Figure 5-1. RGE Package, 24-Pin (VQFN) (Top View)

Table 5-1. Pin Functions

PIN

I/O

DESCRIPTION

NAME

NO.

RX1N

8

Differential I Differential input for 5Gbps negative signal on Channel 1

RX1P

9

Differential I Differential input for 5Gbps positive signal on Channel 1

TX1N

23

Differential O Differential output for 5Gbps negative signal on Channel 1

TX1P

22

Differential O Differential output for 5Gbps positive signal on Channel 1

RX2N

20

Differential I Differential input for 5Gbps negative signal on Channel 2

RX2P

19

Differential I Differential input for 5Gbps positive signal on Channel 2

TX2N

11

Differential O Differential output for 5Gbps negative signal on Channel 2

TX2P

12

Differential O Differential output for 5Gbps positive signal on Channel 2

EQ1

2

I, CMOS

Sets the receiver equalizer gain for Channel 1. 3-state input with integrated pull-up and

pull-down resistors.

EQ1 = Low = 3 dB

EQ1 = Mid = 6 dB

EQ1 = High = 9 dB

DE1

16

I, CMOS

Sets the output de-emphasis for Channel 1. 3-state input with integrated pull-up and pull-

down resistors.

DE1 = Low = 0 dB

DE1 = Mid = -3.5 dB

DE1 = High = -6.2 dB

OS1

15

I, CMOS

Sets the output swing (differential voltage amplitude) for Channel 1. 2-state input with an

integrated pull down resistor.

OS1 = Low = 0.9 mV

OS1 = High = 1.1 mV

EQ2

17

I, CMOS

Sets the receiver equalizer gain for Channel 2. 3-state input with integrated pull-up and

pull-down resistors.

EQ2 = Low = 3 dB

EQ2 = Mid = 6 dB

EQ2 = High = 9 dB

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TUSB522P

SLLSEV9E – JULY 2016 – REVISED NOVEMBER 2023

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