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L4901 数据表(PDF) 7 Page - STMicroelectronics |
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L4901 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 10 page ![]() disable the µP and, through the address decoder M74HC138, to ensure that the RAMS are disabled as soon as the main supply starts to fall. Another interesting application of the L4901A is in µP system with shadow memories (see Figure 6). When the input voltage goes below VIT, the reset ouput enables the execution of a routine that saves the machine’s state in the shadow RAM (xicor x 2201 for example). Thanks to the low consumption of the Reg. 1 a Figure 6 Figure 7 : Quiescent Current (reg.1) versus Output Current Figure 8 : Quiescent Current (reg.1) versus Input Voltage L4901A 7/10 |
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