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L4922 数据表(PDF) 2 Page - STMicroelectronics |
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L4922 数据表(HTML) 2 Page - STMicroelectronics |
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2 / 6 page ![]() PIN CONNECTION (Top view) FUNCTIONAL DESCRIPTION The operating principle of the voltage regulator is basedon thereference,the error amplifier,the driver and the power PNP. This stage uses an Isolated Collector Vertical PNP transistor which allows to ob- tain very low dropout voltage (typ. 450mV) and low quiescent current (IQ = 20mA typically at Io = 1A). Thanks to these features the device is particularly suited when the power dissipation must be limited as, for example, in automotive or industrial applica- tions supplied by battery. The three gain stages (operational amplifier, driver and power PNP) require the external capaci- tor (Comin =22 µF) to guarantee the global stability of the system. The antisaturationcircuit allows to reduce drastically the current peak which takes place during the start up. The reset function is LOW active when the output voltage level is lower than the reset threshold volt- age VRthOFF (typ.value : Vo – 150mV).When the out- put voltage is higher thanVRthON the reset becomes HIGH aftera delaytime settablewith the externalca- pacitorCd. Typicallytd =20ms, Cd = 0.1 µF.Thereset and delay threshold hysteresis improve the noise immunity allowing to avoid false switchings. The typical reset output waveform is shown in fig. 1. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vi DC Input Voltage 35 V Vr DC Reverse Voltage –18 V VD Positive Load Dump Protection (t = 300ms) 60 V TJ Junction Temperature Range –40 to 150 °C Top Operating Temperature Range –40 to 125 °C Tstg Storage Temperature Range –55 to 150 °C THERMAL DATA Symbol Parameter Value Unit Rth j-case Thermal Resistance Junction-case Max. 3.5 °C/W Note: T he circuit is ESD protected according to MIL-STD -883C L4922 2/6 |
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