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SSM2603CPZ-R2 数据表(PDF) 17 Page - Analog Devices

部件名 SSM2603CPZ-R2
功能描述  Low Power Audio Codec
PDF  32 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

SSM2603CPZ-R2 数据表(HTML) 17 Page - Analog Devices

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SSM2603
Rev. 0 | Page 17 of 32
SOFTWARE CONTROL INTERFACE
The software control interface provides access to the user-selectable
control registers and can operate with a 2-wire (I2C) interface.
Within each control register is a control data-word consisting of
16 bits, MSB first. Bit B15 to Bit B9 are the register map address,
and Bit B8 to Bit B0 are register data for the associated register map.
SDIN generates the serial control data-word, SCLK clocks the
serial data, and CSB determines the I2C device address. If the
CSB pin is set to 0, the address selected is 0011010; if 1, the
address is 0011011.
P
9
8
1TO 7
9
8
1TO 7
9
8
1TO 7
S
SDIN
SCLK
START
ADDR
R/W
ACK
ACK
SUBADDRESS
ACK
STOP
DATA
Figure 28. 2-Wire I2C Generalized Clocking Diagram
WRITE
SEQUENCE
READ
SEQUENCE
SA1
A7
A0
A(S)
A(S)
S
B15
B9
0
01
0P
0
...
A1
A7
A0
A(S)
...
B0
B8
B7
A(M)
A(M)
...
B0
B7
P
...
...
...
DEVICE
ADDRESS
DEVICE
ADDRESS
REGISTER
ADDRESS
SA1
A7
A0
A(S)
A(S)
A(S)
B15
B9
B8
0
...
...
DEVICE
ADDRESS
REGISTER
ADDRESS
REGISTER
DATA
(SLAVE DRIVE)
REGISTER
DATA
S/P = START/STOP BIT.
A0 = I2C R/W BIT.
A(S) = ACKNOWLEDGE BY SLAVE.
A(M) = ACKNOWLEDGE BY MASTER.
A(M) = ACKNOWLEDGE BY MASTER (INVERSION).
Figure 29. I2C Write and Read Sequences



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