ADE7169 datasheet(103/144 Pages) AD

103 / 144 page

ADE7566/ADE7569/ADE7166/ADE7169

Rev. A | Page 103 of 144

FLASH MEMORY

In reliability qualification, every byte in both the program and

data Flash/EE memory is cycled from 0x00 to 0xFF until a first

fail is recorded, signifying the endurance limit of the on-chip

Flash/EE memory.

OVERVIEW

Flash memory is a type of nonvolatile memory that is in-circuit

programmable. The default state of a byte of flash memory is 0xFF

(erased). When a byte of flash memory is programmed, the

required bits change from 1 to 0. The flash memory must be

erased to turn the 0s back to 1s. However, a byte of flash

memory cannot be erased individually. The entire segment, or

page, of flash memory that contains the byte must be erased.

As indicated in the Specifications section, the

ADE7566/ADE7569/ADE7166/ADE7169 flash memory

endurance qualification has been carried out in accordance with

JEDEC Standard 22 Method A117 over the industrial temperature

range of −40°C, +25°C, and +85°C. The results allow the

specification of a minimum endurance figure over supply and

temperature of 100,000 cycles, with a minimum endurance figure

of 20,000 cycles of operation at 25°C.

The ADE7566/ADE7569/ADE7166/ADE7169 provide 16 kB of

flash program/ information memory. This memory is segmented

into 32 pages of 512 bytes each. Therefore, to reprogram one

byte of flash memory, the other 511 bytes in that page must be

erased. The flash memory can be erased by page or all at once

in a mass erase. There is a command to verify that a flash write

operation has completed successfully. The ADE7566/ADE7569/

ADE7166/ADE7169 flash memory controller also offers

configurable flash memory protection.

Retention is the ability of the flash memory to retain its

programmed data over time. Again, the parts have been qualified

in accordance with the formal JEDEC Standard 22 Method

A117 at a specific junction temperature (TJ = 55°C). As part of this

qualification procedure, the flash memory is cycled to its

specified endurance limit before data retention is characterized.

This means that the flash memory is guaranteed to retain its data

for its full specified retention lifetime every time the flash

memory is reprogrammed. It should also be noted that

retention lifetime, based on an activation energy of 0.6 eV,

derates with TJ as shown in

The 16 kB of flash memory are provided on-chip to facilitate

code execution without any external discrete ROM device

requirements. The program memory can be programmed in-

circuit, using the serial download or emulation options provided or

using conventional third party memory programmers.

Figure 91.

Flash/EE Memory Reliability

TJ JUNCTION TEMPERATURE (°C)

250

200

150

100

110

300

100

ANALOG DEVICES

SPECIFICATION

100 YEARS MIN.

AT TJ = 55°C

The flash memory arrays on the ADE7566/ADE7569/

ADE7166/ADE7169 are fully qualified for two key Flash/EE

memory characteristics: Flash/EE memory cycling endurance

and Flash/EE memory data retention.

Endurance quantifies the ability of the Flash/EE memory to be

cycled through many program, read, and erase cycles. In real

terms, a single endurance cycle is composed of the following four

independent, sequential events:

Initial page erase sequence.

Read/verify sequence.

Byte program sequence.

Second read/verify sequence.

Figure 91. Flash/EE Memory Data Retention

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