Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

OpAmp Output dynamic voltage

Capacitive load

HVM

HVP

V

OpAmp Bias supply current

(both)

7mA

OpAmp Dynamic Output current

-75

75

mA

PSRR,P

OpAmp Positive power supply

rejection ratio

@ 50kHz

TBD

dB

PSRR,N

OpAmp Negative power supply

rejection ratio

@ 50kHz

TBD

dB

OpAmp Load capacitance

range

Voltage mode Gain min 20dB

0.4

24

nF

OpAmp Integration capacitance

Charge mode Gain min 20dB

0.4

24

nF

K

OpAmp Current ratio

OUTK/OUT1

9.8

10

10.2

(3)

OpAmp Ioutk

Iout1 = 0

-10

50

µA

OpAmp Input offset voltage

±10

mV

Dynamic Shifter

Input Range

14

V

Note 1: Selectable by external resistor.

Note 2: Set by external Coil and Capacitor.

Note 3: It will be write after silicon characterization, it’s designed for a maximum offset of a few mA.

In charge mode the Piezo is in open loop, and if Cpiezo = 0.4nF with a maximum Current error of

±5µA the Maximum long time voltage

drift is

±12mV/µs

ELECTRICAL CHARACTERISTICS (continued)

0

0.004

0.008

0.012

0.016

22

26

(V)

Supply=5V

Supply=8V

D99IN1003

24

28

30

32

34

36

38

Figure 1a. HVP load regulation in single supply

mode”.

L6270 - L6271

5/10