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CLC001 数据表(PDF) 9 Page - National Semiconductor (TI) |
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CLC001 数据表(HTML) 9 Page - National Semiconductor (TI) |
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9 / 11 page ![]() Device Operation (Continued) A typical LVDS input connection is shown in Figure 9. The media is driven differentially by an LVDS driver. The line is terminated with a termination resistor equal to the imped- ance of the line being driven. The actual resistor value is media specific, but typically is between 100 and 120 Ω. This resistor should be located close to the CLC001 inputs pins to minimize the resulting stub length between the resistor and device pads. The CLC001 supports ±100mV thresholds across the entire LVDS common mode range of 0.1V to 2.3V for a 200mV differential signal. 10132909 FIGURE 9. LVDS, DC-coupled www.national.com 9 |
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