L6995

6/25

1

DEVICE DESCRIPTION

1.1 Constant On Time PWM topology

Figure 2. Loop block schematic diagram

The device implements a Constant On Time control scheme, where the Ton is the high side MOSFET on time

duration forced by the one-shot generator. The on time is directly proportional to VSENSE pin voltage and in-

verse to OSC pin voltage as in Eq1:

Eq 1

Eq 2

where

Eq 3

Eq 4

The above equations allow setting the frequency divider ratio

strain of about 580ns is introduced in order to assure the boot capacitor charge and to limit the switching fre-

Q

Vsense

R3

R4

R2

R1

R

S

Vout

Vin

HGATE

LGATE

Q

OSC

FB

Vref

HS

LS

DS

PWM comparator

FFSR

One-shot generator

-

+

T

ON

K

OSC

V

SENSE

V

OSC

----------------------

τ

+

=

f

SW

V

OU T

V

IN

---------------

1

T

ON

-----------

α

OS C

α

OUT

--------------

1

K

OSC

---------------

α

OSC

→

f

==

=

α

OSC

V

OSC

V

IN

---------------

R

2

R

2

R

1

+

--------------------

==

α

OUT

V

FB

V

OUT

---------------

R

4

R

3

R

4

+

--------------------

==