MPC7448 datasheet(13/60 Pages) FREESCALE

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MPC7448 RISC Microprocessor Hardware Specifications, Rev. 4

Freescale Semiconductor

Electrical and Thermal Characteristics

Table 7 provides the power consumption for the MPC7448 part numbers described by this document; see

Section 11.1, “Part Numbers Fully Addressed by This Document,” for information regarding which part

numbers are described by this document. Freescale also offers MPC7448 part numbers that meet lower

power consumption specifications by adhering to lower core voltage and core frequency specifications.

For more information on these devices, including references to the MPC7448 Hardware Specification

Addenda that describe these devices, see Section 11.2, “Part Numbers Not Fully Addressed by This

Document.”

The power consumptions provided in Table 7 represent the power consumption of each speed grade when

operated at the rated maximum core frequency (see Table 8). Freescale sorts devices by power as well as

by core frequency, and power limits for each speed grade are independent of each other. Each device is

tested at its maximum core frequency only. (Note that Deep Sleep Mode power consumption is

independent of clock frequency.) Operating a device at a frequency lower than its rated maximum is fully

supported provided the clock frequencies are within the specifications given in Table 8, and a device

operated below its rated maximum will have lower power consumption. However, inferences should not

be made about a device’s power consumption based on the power specifications of another (lower) speed

grade. For example, a 1700 MHz device operated at 1420 MHz may not exhibit the same power

consumption as a 1420 MHz device operated at 1420 MHz.

For all MPC7448 devices, the following guidelines on the use of these parameters for system design are

suggested. The Full-Power Mode–Typical value represents the sustained power consumption of the device

High-impedance (off-state) leakage current:

Vin = OVDD

Vin = GND

—ITSI

—

– 50

µA

2, 3, 4

Output high voltage @ IOH = –5 mA

1.5

VOH

OVDD – 0.45

—

1.8

OVDD – 0.45

—

2.5

1.8

—

Output low voltage @ IOL = 5 mA

1.5

VOL

—0.45

1.8

—

0.45

2.5

—

0.6

Capacitance,

Vin = 0 V, f = 1 MHz

All inputs

Cin

—8.0

Notes:

1. Nominal voltages; see Table 4 for recommended operating conditions.

2. All I/O signals are referenced to OVDD.

3. Excludes test signals and IEEE Std. 1149.1 boundary scan (JTAG) signals

4. The leakage is measured for nominal OVDD and VDD, or both OVDD and VDD must vary in the same direction (for

example, both OVDD and VDD vary by either +5% or –5%).

5. Capacitance is periodically sampled rather than 100% tested.

6. These pins have internal pull-up resistors.

Table 6. DC Electrical Specifications (continued)

At recommended operating conditions. See Table 4.

Characteristic

Nominal Bus

Voltage 1

Symbol

Min

Max

Unit

Notes

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