Block Diagram

10104915

Operation

The LM2653 operates in a constant frequency (300 kHz),

current-mode PWM for moderate to heavy loads; and it

automatically switches to hysteretic mode for light loads. In

hysteretic mode, the switching frequency is reduced to keep

the efficiency high.

MAIN OPERATION

When the load current is higher than the sleep mode thresh-

old, the part is always operating in PWM mode. At the

beginning of each switching cycle, the high-side switch is

turned on, the current from the high-side switch is sensed

and compared with the output of the error amplifier (COMP

pin). When the sensed current reaches the COMP pin volt-

age level, the high-side switch is turned off; after 40 ns

(deadtime), the low-side switch is turned on. At the end of the

switching cycle, the low-side switch is turned off; and the

same cycle repeats.

The current of the top switch is sensed by a patented internal

circuitry. This unique technique gets rid of the external sense

resistor, saves cost and size, and improves noise immunity

of the sensed current. A feedforward from the input voltage is

added to reduce the variation of the current limit over the

input voltage range.

When the load current decreases below the sleep mode

theshold, the output voltage will rise slightly, this rise is

sensed by the hysteretic mode comparator which makes the

part go into the hysteretic mode with both the high and low

side switches off. The output voltage starts to drop until it hits

the low threshold of the hysteretic comparator, and the part

immediately goes back to the PWM operation. The output

voltage keeps increasing until it reaches the top hysteretic

threshold, then both the high and low side switches turn off

again, and th same cycle repeats.

PROTECTIONS

The cycle-by-cycle current limit circuitry turns off the high-

side MOSFET whenever the current in MOSFET reaches

2A. A second level current limit is accomplished by the

undervoltage protection: if the load pulls the output voltage

down below 80% of its nominal value, the undervoltage latch

protection will wait for a period of time (set by the capacitor

at the LDELAY pin, see LDELAY CAPACITOR section for

more information). If the output voltage is still below 80% of

its nominal after the waiting period, the latch protection will

be enabled. In the latch protection mode, the low-side MOS-

FET is on and the high-side MOSFET is off. The latch

protection will also be enabled immediately whenever the

output voltage exceeds the overvoltage threshold (110% of

its nominal). Both protections are disabled during start-

up.(See SOFT-START CAPACITOR section and LDELAY

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