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ADG3242BRJ-R2 数据表(PDF) 10 Page - Analog Devices |
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ADG3242BRJ-R2 数据表(HTML) 10 Page - Analog Devices |
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10 / 16 page ![]() ADG3242 Rev. A | Page 10 of 16 TERMINOLOGY VCC Positive power supply voltage. GND Ground (0 V) reference. VINH Minimum input voltage for Logic 1. VINL Maximum input voltage for Logic 0. II Input leakage current at the control inputs. IOZ Off state leakage current. It is the maximum leakage current at the switch pin in the off state. IOL On state leakage current. It is the maximum leakage current at the switch pin in the on state. VP Maximum pass voltage. The maximum pass voltage relates to the clamped output voltage of an NMOS device when the switch input voltage is equal to the supply voltage. RON Ohmic resistance offered by a switch in the on state. It is measured at a given voltage by forcing a specified amount of current through the switch. ΔRON On resistance match between any two channels, that is, RON max to RON min. CX OFF Off switch capacitance. CX ON On switch capacitance. CIN Control input capacitance. This consists of BE and SEL. ICC Quiescent power supply current. This current represents the leakage current between the VCC and ground pins. It is measured when all control inputs are at logic high or low level and the switches are off. ΔICC Extra power supply current component for the EN control input when the input is not driven at the supplies. tPLH, tPHL Data propagation delay through the switch in the on state. Propaga- tion delay is related to the RC time constant RON × CL, where CL is the load capacitance. tPZH, tPZL Bus enable times. These are the times taken to cross the VT in response to the control signal, BE. tPHZ, tPLZ Bus disable times. These are the times taken to place the switch in the high impedance off state in response to the control signal. They are measured as the time taken for the output voltage to change by VΔ from the original quiescent level, with reference to the logic level transition at the control input. (See Figure 27 for enable and disable times.) Max Data Rate Maximum rate at which data can be passed through the switch. Channel Jitter Peak-to-peak value of the sum of the deterministic and random jitter of the switch channel. |
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