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ADG3242BRJ-R2 数据表(PDF) 11 Page - Analog Devices |
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ADG3242BRJ-R2 数据表(HTML) 11 Page - Analog Devices |
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11 / 16 page ![]() ADG3242 Rev. A | Page 11 of 16 TIMING MEASUREMENT INFORMATION For the following load circuit and waveforms, the notation that is used is VIN and VOUT where: VIN = VA and VOUT = VB, or VIN = VB and VOUT = VA VCC VIN VOUT CL RL RL SW1 GND 2 × VCC RT DUT PULSE GENERATOR NOTES 1. PULSE GENERATOR FOR ALL PULSES: tR ≤ 2.5ns, tF ≤ 2.5ns, FREQUENCY ≤ 10MHz. 2. CL INCLUDES BOARD, STRAY, AND LOAD CAPACITANCES. 3. RT IS THE TERMINATION RESISTOR, SHOULD BE EQUAL TO ZOUT OF THE PULSE GENERATOR. Figure 25. Load Circuit CONTROL INPUT BE 0V tPLH VOUT VT VIH VH VT VL tPLH Figure 26. Propagation Delay ENABLE DISABLE CONTROL INPUT BE VIN = 0V VIN = VCC VOUT SW1 @ 2VCC VOUT SW1 @ GND tPLZ tPZH tPHZ tPZL VT 0V VCC VT VH VH –VΔ VL VL + VΔ VCC 0V VT VINH 0V Figure 27. Enable and Disable Times Table 6. Switch Position Test S1 tPLZ, tPZL 2 × VCC tPHZ, tPZH GND Table 7. Test Conditions Symbol VCC = 3.3 V ± 0.3 V (SEL = VCC) VCC = 2.5 V ± 0.2 V (SEL = VCC) VCC = 3.3 V ± 0.3 V (SEL = 0 V) Unit RL 500 500 500 Ω VΔ 300 150 150 mV CL 50 30 30 pF VT 1.5 0.9 0.9 V |
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